OpenRISC Reference Board

ORSoC and the OpenRISC architecture has interested me for years. Basically, it is a soft CPU produced without targeting a specific FPGA architecture (as Nios and MicroBlaze does).

It is a RISC design with support from gcc. From version 3.1, the architecture is supported by the mainline Linux kernel, so the software support is nice. On the soft hardware front, i.e. configurable logic designs, the OpenCores site provides loads of peripherals.

On the physical hardware side, ORSoC has just released a new Altera-based board. The board comes with a preconfigured virtual Ubuntu environment, with the tools preinstalled. All this makes it very easy to get started developing for the OpenRISC architecture.

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